DQPSK调制解调设计VHDL代码Quartus仿真

名称：DQPSK调制解调设计VHDL代码Quartus仿真

软件：Quartus

语言：VHDL

代码功能：

DQPSK调制解调设计

1、主要包括载波产生模块、调制模块、解调模块。

2、调制信号使用m序列产生，然后进行差分编码。

3、对差分编码后的数据进行DQPSK调制。

4、对DQPSK调制信号进行解调，输出解调后的2bit数据。

FPGA代码Verilog/VHDL代码资源下载：www.hdlcode.com

演示视频：

设计文档：

1. 工程文件

2. 程序文件

3. 程序编译

4. 程序RTL图

5. Testbench

6. 仿真图

6.1 调制模块

6.2 载波产生模块

6.3 解调模块

部分代码展示:

LIBRARY?ieee;
???USE?ieee.std_logic_1164.all;
???USE?ieee.std_logic_unsigned.all;
--DPSK解调模块
ENTITY?QPSK_demodu?IS
???PORT?(
??????clk???????:?IN?STD_LOGIC;
??????rst???????:?IN?STD_LOGIC;
??????qout??????:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);--调制波
??????cos_wave??:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);--本地载波
??????sin_wave??:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);--本地载波
??????data??????:?OUT?STD_LOGIC_VECTOR(1?DOWNTO?0)--解调输出
???);
END?QPSK_demodu;
ARCHITECTURE?trans?OF?QPSK_demodu?IS
???
???SIGNAL?cos_mul????????:?STD_LOGIC_VECTOR(15?DOWNTO?0);
???SIGNAL?sin_mul????????:?STD_LOGIC_VECTOR(15?DOWNTO?0);
???
???SIGNAL?filter_cos_cnt?:?STD_LOGIC_VECTOR(5?DOWNTO?0)?:=?"000000";
???SIGNAL?filter_sin_cnt?:?STD_LOGIC_VECTOR(5?DOWNTO?0)?:=?"000000";
???SIGNAL?demodulate_a???:?STD_LOGIC?:=?'0';
???SIGNAL?demodulate_b???:?STD_LOGIC?:=?'0';
???
???SIGNAL?cnt????????????:?STD_LOGIC_VECTOR(7?DOWNTO?0)?:=?"00000000";
???
???SIGNAL?a_buf??????????:?STD_LOGIC?:=?'0';
???SIGNAL?b_buf??????????:?STD_LOGIC?:=?'0';
???SIGNAL?a_buf2?????????:?STD_LOGIC?:=?'0';
???SIGNAL?b_buf2?????????:?STD_LOGIC?:=?'0';
???SIGNAL?D_a????????????:?STD_LOGIC;
???SIGNAL?D_b????????????:?STD_LOGIC;
???
???SIGNAL?data_buf???????:?STD_LOGIC_VECTOR(1?DOWNTO?0);
BEGIN
???cos_mul?<=?(cos_wave?*?qout);--调制波形与本地载波相乘
???sin_mul?<=?(sin_wave?*?qout);--调制波形与本地载波相乘
???
--采用计数器滤波，检测到cos_mul(15)?=?'1'后计数到011001
PROCESS?(clk)
???BEGIN
??????IF?(clk'EVENT?AND?clk?=?'1')?THEN
?????????IF?(rst?=?'1')?THEN
????????????filter_cos_cnt?<=?"000000";
?????????ELSIF?(cos_mul(15)?=?'1')?THEN
????????????filter_cos_cnt?<=?"000001";
?????????ELSIF?(filter_cos_cnt?=?"000000")?THEN
????????????filter_cos_cnt?<=?"000000";
?????????ELSIF?(filter_cos_cnt?>=?"011001")?THEN
????????????filter_cos_cnt?<=?"000000";
?????????ELSE
????????????filter_cos_cnt?<=?filter_cos_cnt?+?"000001";
?????????END?IF;
??????END?IF;
???END?PROCESS;
???
???PROCESS?(clk)
???BEGIN
??????IF?(clk'EVENT?AND?clk?=?'1')?THEN
?????????IF?(filter_cos_cnt?=?"000000")?THEN
????????????demodulate_a?<=?'0';--滤波输出解调的a路信号
?????????ELSE
????????????demodulate_a?<=?'1';--滤波输出解调的a路信号
?????????END?IF;
??????END?IF;
???END?PROCESS;
???
--采用计数器滤波，检测到sin_mul(15)?=?'1'后计数到011001
???PROCESS?(clk)
???BEGIN
??????IF?(clk'EVENT?AND?clk?=?'1')?THEN
?????????IF?(rst?=?'1')?THEN
????????????filter_sin_cnt?<=?"000000";
?????????ELSIF?(sin_mul(15)?=?'1')?THEN
????????????filter_sin_cnt?<=?"000001";
?????????ELSIF?(filter_sin_cnt?=?"000000")?THEN
????????????filter_sin_cnt?<=?"000000";
?????????ELSIF?(filter_sin_cnt?>=?"011001")?THEN
????????????filter_sin_cnt?<=?"000000";
?????????ELSE
????????????filter_sin_cnt?<=?filter_sin_cnt?+?"000001";
?????????END?IF;
??????END?IF;
???END?PROCESS;

点击链接获取代码文件：http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=956