• 方案介绍
  • 附件下载
  • 相关推荐
申请入驻 产业图谱

4种波形发生器设计VHDL代码Quartus仿真

09/26 08:42
251
加入交流群
扫码加入
获取工程师必备礼包
参与热点资讯讨论

2-24102R04411P4.doc

共1个文件

名称:4种波形发生器设计VHDL代码Quartus仿真

软件:Quartus

语言:VHDL

代码功能:

4种波形发生器

1、产生方波三角波正弦波锯齿波

2、不同波形通过开关进行选择

3、可以控制波形的频率

FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com

演示视频:

设计文档:

1.工程文件

2.程序文件

3.程序运行

4.RTL图

5.Testbench

6.程序仿真

最终输出波形为wave_data信号,wave_select信号选择输出哪种波形(00方波;01-三角波;10-正弦波;11-锯齿波),frequency_data信号设置波形频率(frequency_data值越小频率越大)。

部分代码展示:

LIBRARY?ieee;
???USE?ieee.std_logic_1164.all;
???USE?ieee.std_logic_unsigned.all;
ENTITY?wave_generation?IS
???PORT?(
??????sys_clk?????????:?IN?STD_LOGIC;--输入时钟
??????sys_rst?????????:?IN?STD_LOGIC;--高电平复位
??????
??????wave_select?????:?IN?STD_LOGIC_VECTOR(1?DOWNTO?0);--00方波;01-三角波;10-正弦波;11-锯齿波
??????frequency_data??:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);--频率控制信号?
??????wave_data???????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--波形输出
???);
END?wave_generation;
ARCHITECTURE?behaviour?OF?wave_generation?IS
???COMPONENT?carrier_wave?IS
??????PORT?(
?????????clk?????????????:?IN?STD_LOGIC;
?????????rst?????????????:?IN?STD_LOGIC;
?????????triangular_wave?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????sawtooth_wave???:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????square_wave?????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????sin_wave????????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)
??????);
???END?COMPONENT;
???
???
???SIGNAL?clk?????????????:?STD_LOGIC;
???SIGNAL?triangular_wave?:?STD_LOGIC_VECTOR(7?DOWNTO?0);
???SIGNAL?sawtooth_wave???:?STD_LOGIC_VECTOR(7?DOWNTO?0);
???SIGNAL?square_wave?????:?STD_LOGIC_VECTOR(7?DOWNTO?0);
???SIGNAL?sin_wave????????:?STD_LOGIC_VECTOR(7?DOWNTO?0);
???
???SIGNAL?clk_cnt?????????:?STD_LOGIC_VECTOR(7?DOWNTO?0)?:=?"00000000";
BEGIN
???
???
???carrier_wave_ge?:?carrier_wave
??????PORT?MAP?(
?????????clk??????????????=>?clk,
?????????rst??????????????=>?sys_rst,
?????????triangular_wave??=>?triangular_wave,
?????????sawtooth_wave????=>?sawtooth_wave,
?????????square_wave??????=>?square_wave,
?????????sin_wave?????????=>?sin_wave
??????);
???PROCESS?(sys_clk)
???BEGIN
??????IF?(sys_clk'EVENT?AND?sys_clk?=?'1')?THEN
?????????IF?(sys_rst?=?'1')?THEN
????????????clk_cnt?<=?"00000000";
?????????ELSIF?(clk_cnt?=?frequency_data)?THEN
????????????clk_cnt?<=?"00000000";
?????????ELSE
????????????clk_cnt?<=?clk_cnt?+?"00000001";
?????????END?IF;
??????END?IF;
???END?PROCESS;

点击链接获取代码文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=1276

  • 2-24102R04411P4.doc
    下载

相关推荐