名称:LCD1602液晶显示器设计VHDL代码Quartus? DE2-115开发板
软件:Quartus
语言:VHDL
代码功能:LCD1602液晶显示器设计
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
本代码已在DE2-115开发板验证,DE2-115开发板如下,其他开发板可以修改管脚适配:
演示视频:
设计文档:
1.?工程文件
2.?程序文件
3.?程序编译
4.?管脚分配
5.?Testbench
6.?仿真图
部分代码展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; ???USE?ieee.std_logic_unsigned.all; --?This?is?the?template?for?Lab01.??You?should?start?with?this; --?it?will?make?your?life?easier. ENTITY?lab1?IS ???PORT?( ??????clk_in????:?IN?STD_LOGIC;--时钟 ????????KEY?:?in?std_logic_vector(3?downto?0);??--?pushbutton?switches ????????SW?:?in?std_logic_vector(8?downto?0);??--?slide?switches ????????LEDG?:?out?std_logic_vector(7?downto?0);?--?green?LED's?(you?might?want?to?use ?????????????????????????????????????????????????--?this?to?display?your?current?state) ????????LCD_RW?:?out?std_logic;??--?R/W?control?signal?for?the?LCD ????????LCD_EN?:?out?std_logic;??--?Enable?control?signal?for?the?LCD ????????LCD_RS?:?out?std_logic;??--?Whether?or?not?you?are?sending?an?instruction?or?character ????????LCD_ON?:?out?std_logic;??--?used?to?turn?on?the?LCD ????????LCD_BLON?:?out?std_logic;?--?used?to?turn?on?the?backlight ????????LCD_DATA?:?out?std_logic_vector(7?downto?0));??--?used?to?send?instructions?or?characters END?lab1; ARCHITECTURE?behave?OF?lab1?IS ??? ???SIGNAL?clk?????????:?STD_LOGIC; ???SIGNAL?clk_1Hz?????:?STD_LOGIC; ???SIGNAL?rst_n???????:?STD_LOGIC; ???SIGNAL?dir?????????:?STD_LOGIC; ??? ???SIGNAL?div_cnt?????:?STD_LOGIC_VECTOR(25?DOWNTO?0); ??? ???type?current_state???is( ???????????????????????????Send_38??, ???????????????????????????Send_0x38, ???????????????????????????Send_0x0c, ???????????????????????????Send_0x01, ???????????????????????????Send_0x06, ???????????????????????????Send_0x80, ???????????????????????????Send_Z???, ???????????????????????????Send_h???, ???????????????????????????Send_o???, ???????????????????????????Send_u???, ???????????????????????????Send_y???); SIGNAL?state?:?current_state?; ????SIGNAL?led_state?????:?STD_LOGIC_VECTOR(6?DOWNTO?0); BEGIN ???LCD_BLON?<=?'1'; ???LCD_ON?<=?'1'; ???LCD_EN?<=?clk_1Hz; ???LCD_RW?<=?'0'; ???--clk?<=clk_in;--?仿真用该句 ???clk?<=clk_1Hz;--?实际上板验证用该句 ???--clk?<=KEY(0); ???rst_n?<=?KEY(3); ???dir?<=?SW(0); ??? --时钟分频计数,计数50000000 ???PROCESS?(clk_in,?rst_n) ???BEGIN ??????IF?((NOT(rst_n))?=?'1')?THEN ?????????div_cnt?<=?"00000000000000000000000000"; ??????ELSIF?(clk_in'EVENT?AND?clk_in?=?'1')?THEN ?????????IF?(div_cnt?>=?"10111110101111000010000000")?THEN ????????????div_cnt?<=?"00000000000000000000000000"; ?????????ELSE ????????????div_cnt?<=?div_cnt?+?"00000000000000000000000001"; ?????????END?IF; ??????END?IF; ???END?PROCESS;
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